The demand for semiconductor devices to be made smaller is ever present because size reduction typically increases speed and performance. Moreover, reduction of the size of components of semiconductor devices can also increase packing density, allowing a manufacturer to produce wafers having more components.
In some conventional semiconductor devices, an emitter contact region is either aligned to a shallow trench or local oxidation on silicon isolation structure or is defined by a photoresist in a non-self-aligned manner. Such methods can make it difficult to control the width of the emitter contact region and difficult to control the distance between the emitter contact region and a base contact region. Furthermore, misalignment during a silicide block process can decrease the reliability of the device.